Control Circuit Operation Overview

The printer CPU is an 8-bit CPU TMP90C041 running at 10 MHz. It oversees control of all the components of the printer. The E05A50 gate array contains various memory management functions that control the assignment of the memory and I/O areas. Rationalization and simplification of the circuitry is achieved through use of the STK-6022B, which holds all the driver circuits for driving the PRINTER MECHANISM on a single chip. Figure 2-17 shows the control circuits in block diagram form. I

C062PNL Board r

C062 MAIN Board

C062 MAIN Board

1 PRINTHEAD MOTOR, CR MOTOR, P.F DETECTOR AS SY.,DETECTOR ASSY., DETECTOR ASSY., DETECTOR ASSY., DETECTOR ASSY.j I HP PE, FRONT PE, REAR PLATEN RELEASE i 1 J

He 136 column only

He 136 column only

PROM

PSRAM

1 t

PSRAM

1 i i

MROM

MROM

S 12K

2S6K

1

64K

i

BM

8M

(S E)

(6E)

I t

( 1 E)

1

(3E)

(4E)

1 PRINTHEAD MOTOR, CR MOTOR, P.F DETECTOR AS SY.,DETECTOR ASSY., DETECTOR ASSY., DETECTOR ASSY., DETECTOR ASSY.j I HP PE, FRONT PE, REAR PLATEN RELEASE i 1 J

PRINTER MECHANISM

GA Gate array DETECTOR ASSY., HP Home position sensor

DETECTOR ASSY., RELEASE Platen gap sensor MOTOR, CR Carriage motor

DETECTOR ASSY., RELEASE Release sensor MOTOR, PF Paper advance motor

DETECTOR ASSY., PE, FRONT Front paper-out detector (positioned in front of the PRINTER MECHANISM) DETECTOR ASSY., PE, REAR Rear paper-out detector (positioned behind the PRINTER MECHANISM)

Table 2-5 lists the functions of the main components and circuits of the printer. The CPU converts the print data sent from the host computer to image data (the print image). The image data is then loaded to RAM. Each line of data is processed sequentially. The CPU transfers the print data to the printhead drive circuit. The CPU sends the printhead drive pulse to the printhead drive circuit. The length of this pulse corresponds to the printhead drive voltage. The head drive circuit then outputs the head drive signal.

Printhead Drive Pulse

Printhead

Printhead Drive Pulse

Printhead

Figure 2-18. Data Flow Table 2-5. Functions of the MainIC and Circuits

IC or Circuit

Location

Functions

TMP90C041

1C

Receives data from the host computer and loads the data to the input buffer in RAM (under interrupt processing control). Expands the input data held in the buffer to create image data. Loads this image data to the image buffer in RAM. Transfers the image data to the printhead drive circuit. Also controls various parts of the PRINTER MECHANISM, such as the motors.

E05A50

4D

This is a gate array consisting of three components configured on a single chip:

Memory Management Unit Handles CPU memory in ROM, RAM, and mask ROM, and assigns addresses for other devices.

Parallel Interface (Parallel I/F)

Holds the parallel interface functions.

Reset Circuit

Contains the circuit that generates the RESET signal.

Table 2-5. Functions of the Main IC and Circuits (Cont.)

or Circuit

Location

Functions

STK-6022B

2A

This is a single chip that houses drive circuits for the printhead, MOTOR,CR and MOTOR, PF of the PRINTER MECHANISM. The chip also includes the various sensor input circuits for the PRINTER MECHANISM.

PROM

5E

PROM contains the program that runs the CPU.

RAM

1E

Holds the CPU working area and the various buffers. (1 E is not used for an 80-column device and is not installed.)

MROM (Mask ROM)

3E 4E

Holds the character design (also called the character generator).

EEPROM

4C

EEPROM is an electronically writable and erasable ROM used to hold such information as the TOF position.

Vref Circuit

This is a circuit for generating the reference voltage used in the A/D convertor within the CPU.

2.3.2 Reset Circuit

Figure 2-19 shows the reset circuit in block diagram form. The reset circuit issues the RESET signal. Each part of the control circuits is initialized when this RESETsignal is received. The conditions when the RESET signal is output are described below.

When turning on the power supply

Immediately after the power has been turned on, STK-6022B (2A) outputs the VCCON pulse. E05A50 (4D) receives this pulse and then outputs the DISC pulse. The electrical charge in the condenser within the STK-6022B is then discharged. After this, STK-6022"B outputs the THLD signal, and E05A50 then outputs the RESET signal. After a certain time has elapsed, the charge in the condenser in the STK-6022B builds up again. The THLD signal is canceled and then the RESET signal is canceled.

Resets performed by the CPU itself (CPU self-reset)

The CPU outputs the RESET signal if there is a RESET request for E05A50 and if E05A50 has output the DISC pulse.

+5 V,

stk-6022b

Line

(2A)

i

L

VCCON

75

107

thld

73 106

"disc

72 ,0 5

thld

DISC

e05a50 (4D>

thld

DISC

reset

CPU Self Reset

VCCON _

"5ÏSC THLD RESET

Figure 2-20. RESET Signal Timing

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